library ieee; --库函数

use ieee.std_logic_1164.all;--定义了std_logic数据类型及相应运算

entity name is

port(

A:in std_logic;

R:out std_logic_VECTOR (0 to 15)

C:out std_logic_VECTOR (0 to 15)

);

end name;

architecture Behavior of name is

signal s,counter:integer:=0 ;

begin

process(A)

begin

if(A'event and A='1')then

case s is

when 0=> R<= "1111111111111111";c<="0000000000000000";s<=;

when 1=> R<= "1111111111111111";c<="0000000000000000";s<=;

when 2=> R<= "1111111111111111";c<="0000000000000000";s<=;

when 3=> R<= "1111111111111111";c<="0000000000000000";s<=;

when 4=> R<= "1111111111111111";c<="0000000000000000";s<=;

when 5=> R<= "1111111111111111";c<="0000000000000000";s<=;

when 6=> R<= "1111111111111111";c<="0000000000000000";s<=;

when 7=> R<= "1111111111111111";c<="0000000000000000";s<=;

when 8=> R<= "1111111111111111";c<="0000000000000000";s<=;

when 9=> R<= "1111111111111111";c<="0000000000000000";s<=;

when 10=> R<= "1111111111111111";c<="0000000000000000";s<=;

when 11=> R<= "1111111111111111";c<="0000000000000000";s<=;

when 12=> R<= "1111111111111111";c<="0000000000000000";s<=;

when 13=> R<= "1111111111111111";c<="0000000000000000";s<=;

when 14=> R<= "1111111111111111";c<="0000000000000000";s<=;

end case;

end if;

end process;

end V1;