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For the following Karnaugh map, give the circuit implementation using one 4-to-1 multiplexer and as many 2-to-1 multiplexers as required, but using as few as possible. You are not allowed to use any other logic gate and you must use a and b as the multiplexer selector inputs, as shown on the 4-to-1 multiplexer below.
题目.png这里需要清楚对mux_in[0],mux_in[1],mux_in[3],mux_in[3]分别采用c,d的表述形式,就是你要清楚知道mux_in[0]时是cd分别表示01,11,10时才会得到的结果。也就是当c+d = 1时才会得到mux_in[0]= 1的表达。也就是意味着仅仅c,d都为0时,结果才会为0.
- HDLBits 这一部分的题目没有什么好说的,就是直接按照真值表去画卡诺图然后化简写出逻辑表达式就好。
- 卡诺图化简
- SOP form 即与或式,对应于卡诺图就是圈1即可
- POS form 即或与式, 对应于卡诺图就是圈0后,整体取反
