A CPU cache is a cache used by the central processing unit (CPU) of a computer to reduce the average time to access data from the main memory. The cache is a smaller, faster memory which stores copies of the data from frequently used main memory locations.
Data is transferred between memory and cache in blocks of fixed size, called cache lines.
Most modern desktop and server CPUs have at least three independent caches: an instruction cache to speed up executable instruction fetch, a **data cache **to speed up data fetch and store, and a translation lookaside buffer (TLB) used to speed up virtual-to-physical address translation for both executable instructions and data.
The data cache is usually organized as** a hierarchy of more cache levels** (L1, L2, etc.; see also multi-level caches below). However, **a TLB cache is part of the memory management unit (MMU) **and not directly related to the CPU caches.
The proportion of accesses that result in a cache hit is known as the hit rate, and can be a measure of the effectiveness of the cache for a given program or algorithm.
Read misses delay execution because of requiring data to be transferred from memory, which is much slower than reading from the cache. Write misses may occur without such penalty, since the processor can continue execution while data is copied to main memory in the background.
写缺失：CPU更新内存数据中，在Cache中没有找到相关数据（地址和数值）。
Cache写机制：Write-through与Write-back
参考文献：Modern Hardware
