SystemVerilog 对case支持问题

上代码

always_comb begin
    next_state = state;
    case(state)
        IDLE:   next_state =  ctrl_valid && ctrl_ready ? START : IDLE;
        START:
            if (bit_mode) next_state = ONE;
            else
                case(guard_o)                                                         //---------------might be critical path
                    6'b1?????: next_state = ONE;
                    6'b01????: next_state = TWO;
                    6'b001???: next_state = THREE;
                    6'b0001??: next_state = FOUR;
                    6'b00001?: next_state = FIVE;
                    6'b000001: next_state = SIX;
                    default:   next_state = almost_finish ? IDLE : START;
                endcase
        ONE:
            if (bit_mode) next_state = TWO;
            else
                case(guard_o[4:0])
                    5'b1????: next_state = TWO;
                    5'b01???: next_state = THREE;
                    5'b001??: next_state = FOUR;
                    5'b0001?: next_state = FIVE;
                    5'b00001: next_state = SIX;
                    default:  next_state = almost_finish ? IDLE : START;
                endcase
        TWO:
            if (bit_mode) next_state = THREE;
            else
                case(guard_o[3:0])
                    4'b1???:  next_state = THREE;
                    4'b01??:  next_state = FOUR;
                    4'b001?:  next_state = FIVE;
                    4'b0001:  next_state = SIX;
                    default:  next_state = almost_finish ? IDLE : START;
                endcase
        THREE:
            if (bit_mode) next_state = FOUR;
                else
                case(guard_o[2:0])
                    3'b1??:   next_state = FOUR;
                    3'b01?:   next_state = FIVE;
                    3'b001:   next_state = SIX;
                    default:  next_state = almost_finish ? IDLE : START;
                endcase
        FOUR:
            if (bit_mode) next_state = FIVE;
                else
                case(guard_o[1:0])
                    2'b1?:   next_state = FIVE;
                    2'b01:   next_state = SIX;
                    default:  next_state = almost_finish ? IDLE : START;
                endcase
        FIVE:
            if (bit_mode) next_state = SIX;
            else if(guard_o[0] == 1) next_state = SIX;
            else next_state = almost_finish ? IDLE : START;
        SIX:
            next_state = almost_finish ? IDLE : START;
    endcase

这种优先型的组合逻辑运转不正常，Vivado报warning

[Synth 8-153] case item 6'b1zzzzz will never be executed ["...":...]
......

更换为if描述后，行为正常，但是不太理解为什么不支持。

always_comb begin
    next_state = state;
    case(state)
        IDLE: next_state =  ctrl_valid && ctrl_ready ? START : IDLE;
        START:
            if(bit_mode) next_state = ONE;                          //[4bit]
            else if(guard_map_i[5] == 1) next_state = ONE;
            else if(guard_map_i[4] == 1) next_state = TWO;
            else if(guard_map_i[3] == 1)  next_state = THREE;
            else if(guard_map_i[2] == 1)  next_state = FOUR;
            else if(guard_map_i[1] == 1)  next_state = FIVE;
            else if(guard_map_i[0] == 1)  next_state = SIX;
            else  next_state = almost_finish ? IDLE : START;
                
        ONE:
            if(bit_mode) next_state = TWO;   
            else if(guard_map[4] == 1) next_state = TWO;
            else if(guard_map[3] == 1) next_state = THREE;
            else if(guard_map[2] == 1) next_state = FOUR;
            else if(guard_map[1] == 1) next_state = FIVE;
            else if(guard_map[0] == 1) next_state = SIX;
            else  next_state = almost_finish ? IDLE : START;
        TWO:
            if(bit_mode) next_state = THREE;   
            else if(guard_map[3] == 1) next_state = THREE;
            else if(guard_map[2] == 1) next_state = FOUR;
            else if(guard_map[2] == 1) next_state = FIVE;
            else if(guard_map[2] == 1) next_state = SIX;
            else next_state = almost_finish ? IDLE : START;
        THREE:
            if(bit_mode) next_state = FOUR;   
            else if(guard_map[2] == 1)next_state = FOUR;
            else if(guard_map[1] == 1) next_state = FIVE;
            else if(guard_map[0] == 1) next_state = SIX;
            else next_state = almost_finish ? IDLE : START;
        FOUR:
            if(bit_mode) next_state = FIVE;   
            else if(guard_map[1] == 1) next_state = FIVE;
            else if(guard_map[0] == 1) next_state = SIX;
            else next_state = almost_finish ? IDLE : START;
        FIVE:
            if(bit_mode) next_state = SIX;   
            else if(guard_map[0] == 1) next_state = SIX;
            else next_state = almost_finish ? IDLE : START;
        SIX:
            next_state = almost_finish ? IDLE : START;
    endcase
end