[DRC NSTD-1] Unspecified I/O Standard: 4 out of 134 logical ports use I/O standard (IOSTANDARD) value 'DEFAULT', instead of a user assigned specific value. This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all I/O standards. This design will fail to generate a bitstream unless all logical ports have a user specified I/O standard value defined. To allow bitstream creation with unspecified I/O standard values (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks NSTD-1]. NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run. Problem ports: GPIO_LED_0[3:0].
[DRC UCIO-1] Unconstrained Logical Port: 4 out of 134 logical ports have no user assigned specific location constraint (LOC). This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all pin locations. This design will fail to generate a bitstream unless all logical ports have a user specified site LOC constraint defined. To allow bitstream creation with unspecified pin locations (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks UCIO-1]. NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run. Problem ports: GPIO_LED_0[3:0].
pin planning error原因是 GPIO_LED_0[3:0] 和xdc文件上的名称不一致 xdc是GPIO_LED[3:0] 。注意观察bd文件中的引脚名称和xdc文件是否一样，或者打开implementation----->layout----->io管脚来观看是否引脚对的。或参考https://www.eefocus.com/otod3r/blog/14-04/302799_38ddf.html试试
2.
[BD 41-1356] Address block </math_ip_0/S_AXI/reg0> is not mapped into </processing_system7_0/Data>.。。。。。。。。。。。。。。
错误原因：地址分配有问题，点击其中一个小按钮自动分配下地址就行了
